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1, 7, 8: Silicon Oxide Layer; 2: Cavity (Vacuum); 3: Silicon Membrane; 4: Metal Electrode Layer (Gold);

5, 6: Water

Global Parameters:

r_mem (device radius): 70 um

t_mem (device height): 1.34 um

r_cav (cavity radius): 60 um

t_cav (cavity height): 1.5 um

t_ox (oxide height): 250 nm

t_metal (metal height): 100 nm

Vdc (DC Bias): 80 V

fre (AC Frequency): 100 kHz

Vac (AC excitation): 50 mV

Device Size Specification:

Membrane (3):

width - r_mem

height - t_mem

Oxide Layer (1, 7, 8):

width - r_mem

height - t_ox + t_cav

Cavity (2):

width - r_cav

height - t_cav

Electrode (4):

width - r_mem

height - t_metal

Results

Resonance Frequency: 0.4 MHz

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Maximum displacement and impedance occur at 0.4 MHz

AC Potential VS Membrane Displacement

0.6 MHz AC Frequency

0.6 MHz AC Frequency

0.2 MHz AC Frequency

0.2 MHz AC Frequency

0.45 MHz AC Frequency

0.45 MHz AC Frequency

DC Bias VS Membrane Displacement

β†’ Problem when computing DC Bias over 152.5V (inverted mesh error)

Pressure/Intensity vs Membrane Displacement

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Highest output pressure when frequency set to resonant frequency (0.4 MHz)

Questions: